- Feb 09, 2022
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Jiri Kovanda authored
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Jiri Kovanda authored
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Jiri Kovanda authored
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Marek Behun authored
Add a new status word bit USER_REGULATOR_NOT_SUPPORTED_STSBIT and set it if the user regulator support is not compiled in. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
It can be useful for the userspace to be able to determine whether the MCU is STM32 or GD32, without depending on determining this from firmware version (git commit ID). Add new status word bit GD32_MCU_STSBIT and set it to 1 in GD32 firmware. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Jiri Kovanda authored
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- Feb 08, 2022
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Jiri Kovanda authored
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Marek Behun authored
The reset button does not currenlty work when in bootloader. Also after flashing MCU firmware with mcutool and rebooting, the reboot does not work. This is because in bootloader's RESET_MANAGER code, we need to read SYSRES_OUT_PIN's input, not output. In STM32's version we are reading input. I guess this was a mistake when converting from STM32 to GD32. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
This new tool compiles bootloader and application, and creates one output image containing both, padding them with 0xFF bytes. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
GD32 offers HW CRC32 circuit. When compiling application binary, store its size and crc32 checksum at offsets 0x110 and 0x114 of the binary (immediately after ISR vectors). Then in bootloader if the crc32 checksum does not check out, do not boot the application and stay in bootloader, but power the device on. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
- generate dissassembled output (useful for debugging) - some cleanups Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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- Feb 07, 2022
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Marek Behun authored
Similarly to how we have rewritten application's slave_i2c_device code, rewrite also boot_i2c. With correct handling of interrupts we can get rid of the weird "missing 129th byte" issue. Also by disabling ACK when erasing/writing, we achieve that mcutool retries sending packets. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
For all interrupts we are using pre-emption priority 0 and sub-priorities 1-5, but GD32's implementation of nvic_enable_irq() allows for only 4 bits of priority, and the default setting is 2 bits for pre-emption priority and 2 bits for subpriority. This means that upper bits of the subpriorities we are using are throws away, and so our prioritization handler prio handler prio ======= ==== ======= ==== i2c 1 leds 0 delay 2 ==============> i2c 1 debounce 3 gets changed to led effect 1 leds 4 power 1 led effect 5 delay 2 power 5 debounce 3 Fix this by allowing one more bit for subpriority. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Now that we can detect whether a transaction was successful, move deleting button status and counter bit to AERR handler, so that it is deleted only after the information is successfuly transmitted to master. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
In case we somehow miss the end of tx transaction, we need to reset tx buffer when new rx transaction is being started. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Improvements: - enable TBE/RBNE interrupt only after address is received - enable ERR interrupt after when slave is trasmitting, so that we can detect STOP condition via AERR interrupt - handle BERR and OUERR interrupts to avoid interrupt storms in case something bad occurs when ERR interrupt is enabled - send 0xFF byte if master wants data and we do not have any (this is the only sensible way to do this on GD32) Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
User configurable regulator was never used and is not put on boards. The corresponding code takes a lot of place. Build it only if USER_REGULATOR_ENABLED is set to 1 during build: make USER_REGULATOR_ENABLED=1 Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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- Feb 06, 2022
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Marek Behun authored
Allow choosing baudrate for serial debug output via DBG_BAUDRATE make option, for example: make DBG_ENABLE=1 DBG_BAUDRATE=921600 If not used, 115200 Bd is used as default. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Instead of redefining the DBG_ENABLE macro in debug_serial.h header, make it so that we can enable serial debug output by passing DBG_ENABLE=1 to make: make app DBG_ENABLE=1 Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
When debugging is enabled, the CARD_DET pin is used as UART-TX and PCI_PLED1 pin as UART-RX. Don't configure them as GPIOs when debugging is enabled. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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- Feb 03, 2022
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Marek Behun authored
It can also happen that a new ADDSEND interrupt is received while we still haven't handled receiving/transmitting data from previous transaction. In such a case we receive both ADDSEND and RBNE/TBE interrupt. We need to prefer RBNE/TBE before ADDSEND. (It always means that the data not yet received/transmitted belong to previous transaction, because I2C only starts receiving/transmitting after ADDSEND is cleared.) Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
This way when receiving both STPDET and ADDSEND interrupt, we first stop the state machine and only then start receive new transaction. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
On GD32 sometimes when the I2C interrupt handler is invoked, multiple interrupts can be set. If these happen to be STPDET and ADDSEND because a transaction was completed (STPDET) and new trasaction immediately started (ADDSEND), we need to somehow enforce handling of STPDET first. Prepare a handler state machine for this. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Reset rx counters on ADDR event and TX counters on STPDET event. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Rename the variable to tx_data_len, similar to tx_data_ctr, and move it into the i2c_status structure. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Resetting rx buffer size in this case makes it so that the following bytes are interpreted as next command, although they should be ignored because this I2C transaction is already bad. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
There is currently a bug wherein the access to the rx_buf[] array overflows when too much bytes are received. This was not a problem because in the i2c_state structure there is tx_buf[] array after rx_buf[], but fix this anyway. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
There is a bug wherein on too much received bytes we return from the I2C interrupt handler without enabling interrupts. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Error interrupts are disabled and this check is commented, remove it. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
This includes STM32 specific code and also ACK bit experiments. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
Writing 1 into the ACKEN bit in I2C control 0 register does not trigger sending ACK. Instead it makes is so that when next byte is received, the controller sends ACK if ACKEN=1 or NACK if ACKEN=0. Thus calling i2c_ack_config(I2C_PERIPH_NAME, I2C_ACK_ENABLE); after every received byte is unnecessary. In current code we never disable ACKEN, thus remove the redundant enables. NOTE: THIS ALSO RESULTS IN STPDET INTERRUPT NOT BEING THROWN AWAY! Previously Jirka moved code from STPDET handling into CMD_GET_STATUS_WORD because he didn't get STPDET interrupt. That was because this rewriting of ACKEN bit clears STPDET bit! Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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Marek Behun authored
The i2c_interrupt_flag_get() has a rather complex code for what it does, and the reason is simply bad design of macro constants in the GD32 library. Read the I2C status 0 register directly in the interrupt handler, which makes the handler faster and less complicated (even for reading the code!). Simplify also clearing of the ADDSEND bit. Signed-off-by:
Marek Behún <marek.behun@nic.cz>
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- Feb 01, 2022
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Jiri Kovanda authored
Fix LED support See merge request !1
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