patches/openwrt: mvebu: PCI aardvark workaround: drop

Let's see if this is still required

patches/openwrt/hack/0001-mvebu-PCI-aardvark-Implement-workaround-for-PCIe-Com.patch

-From 30af4b73a8c09340dfa196333742672594b8bad6 Mon Sep 17 00:00:00 2001
-From: Josef Schlehofer <pepe.schlehofer@gmail.com>
-Date: Tue, 3 Aug 2021 15:21:58 +0200
-Subject: [PATCH] mvebu: PCI: aardvark: Implement workaround for PCIe
- Completion Timeout
-
-Awaiting upstream merge:
-https://www.spinics.net/lists/linux-pci/msg110313.html
----
- .../patches-5.4/100-aardvark-workaround.patch | 37 +++++++++++++++++++
- 1 file changed, 37 insertions(+)
- create mode 100644 target/linux/mvebu/patches-5.4/100-aardvark-workaround.patch
-
-diff --git a/target/linux/mvebu/patches-5.4/100-aardvark-workaround-PCIe.patch b/target/linux/mvebu/patches-5.4/100-aardvark-workaround-PCIe.patch
-new file mode 100644
-index 0000000000..8a52c48710
---- /dev/null
-+++ b/target/linux/mvebu/patches-5.4/100-aardvark-workaround-PCIe.patch
-@@ -0,0 +1,60 @@
-+From 944d9a6ff6927134697d444fa0a06e56d8ac7d15 Mon Sep 17 00:00:00 2001
-+From: Pali Rohár <pali@kernel.org>
-+Date: Tue, 3 Aug 2021 15:19:41 +0200
-+Subject: [PATCH] PCI: aardvark: Implement workaround for PCIe Completion Timeout
-+
-+Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions
-+document describes in erratum 3.12 PCIe Completion Timeout (Ref #: 251),
-+that PCIe IP does not support a strong-ordered model for inbound posted vs.
-+outbound completion.
-+
-+As a workaround for this erratum, DIS_ORD_CHK flag in Debug Mux Control
-+register must be set. It disables the ordering check in the core between
-+Completions and Posted requests received from the link.
-+
-+It was reported that enabling this workaround fixes instability issues and
-+"Unhandled fault" errors when using 60 GHz WiFi 802.11ad card with Qualcomm
-+QCA6335 chip under significant load which were caused by interrupt status
-+stuck in the outbound CMPLT queue traced back to this erratum.
-+
-+This workaround fixes also kernel panic triggered after some minutes of
-+usage 5 GHz WiFi 802.11ax card with Mediatek MT7915 chip:
-+
-+    Internal error: synchronous external abort: 96000210 [#1] SMP
-+    Kernel panic - not syncing: Fatal exception in interrupt
-+
-+Signed-off-by: Pali Rohár <pali@kernel.org>
-+
-+This comes from https://www.spinics.net/lists/linux-pci/msg110313.html
-+
-+---
-+ drivers/pci/controller/pci-aardvark.c | 7 +++++++
-+ 1 file changed, 7 insertions(+)
-+
-+diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
-+index 9ff68abd8d1e..231f4469d87e 100644
-+--- a/drivers/pci/controller/pci-aardvark.c
-++++ b/drivers/pci/controller/pci-aardvark.c
-+@@ -167,6 +167,8 @@
-+ #define     LTSSM_L0				0x10
-+ #define     RC_BAR_CONFIG			0x300
-+ #define VENDOR_ID_REG				(LMI_BASE_ADDR + 0x44)
-++#define DEBUG_MUX_CTRL_REG			(LMI_BASE_ADDR + 0x208)
-++#define     DIS_ORD_CHK				BIT(30)
-+ 
-+ /* PCIe core controller registers */
-+ #define CTRL_CORE_BASE_ADDR			0x18000
-+@@ -450,6 +452,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
-+ 		PCIE_CORE_CTRL2_TD_ENABLE;
-+ 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
-+ 
-++	/* Disable ordering checks, workaround for erratum 3.12 "PCIe completion timeout" */
-++	reg = advk_readl(pcie, DEBUG_MUX_CTRL_REG);
-++	reg |= DIS_ORD_CHK;
-++	advk_writel(pcie, reg, DEBUG_MUX_CTRL_REG);
-++
-+ 	/* Set lane X1 */
-+ 	reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
-+ 	reg &= ~LANE_CNT_MSK;
-+-- 
-+2.20.1
-+
--- 
-2.30.2
-