patches/openwrt: Turris 1.x: improve DTS

patches/openwrt/wip/0002-Add-Turris-1.X-support-kernel-5.4.patch

@@ -217,15 +217,18 @@ index ab05cb8551..e963edf558 100644
 +CONFIG_MTD_NAND_ECC_SW_BCH=y
 diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/turris1x.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/turris1x.dts
 new file mode 100644
-index 0000000000..4aecea0d5a
+index 0000000000..1b27c1b0bb
 --- /dev/null
 +++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/turris1x.dts
-@@ -0,0 +1,467 @@
+@@ -0,0 +1,475 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/*
 + * Turris 1.x Device Tree Source
 + *
 + * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
++ *
++ * Pinout, Schematics and Altium hardware design files are open source
++ * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
 + */
 +
 +#include <dt-bindings/gpio/gpio.h>
@@ -268,12 +271,17 @@ index 0000000000..4aecea0d5a
 +			};
 +
 +			/* STM32F030R8T6 MCU for power control */
-+			power-control@32 {
++			power-control@2a {
 +				/*
 +				 * Turris Power Control firmware runs on STM32F0 MCU.
 +				 * This firmware is open source and available at:
 +				 * https://gitlab.nic.cz/turris/hw/turris_power_control
 +				 */
++				reg = <0x2a>;
++			};
++
++			/* DDR3 SPD/EEPROM PSWP instruction */
++			eeprom@32 {
 +				reg = <0x32>;
 +			};
 +
@@ -292,6 +300,11 @@ index 0000000000..4aecea0d5a
 +				reg = <0x52>;
 +			};
 +
++			/* MCP79402-I/ST Protected EEPROM */
++			eeprom@57 {
++				reg = <0x57>;
++			};
++
 +			/* ATSHA204-TH-DA-T crypto module */
 +			crypto@64 {
 +				compatible = "atmel,atsha204";
@@ -304,11 +317,6 @@ index 0000000000..4aecea0d5a
 +				reg = <0x69>;
 +			};
 +
-+			/* MCP79402-I/ST Protected EEPROM */
-+			eeprom@57 {
-+				reg = <0x57>;
-+			};
-+
 +			/* MCP79402-I/ST RTC */
 +			rtc@6f {
 +				compatible = "microchip,mcp7940x";
@@ -538,7 +546,7 @@ index 0000000000..4aecea0d5a
 +		};
 +
 +		/* LCMXO1200C-3FTN256C FPGA */
-+		cpld: cpld@3,0 {
++		cpld@3,0 {
 +			/*
 +			 * Turris CPLD firmware which runs on this Lattice FPGA,
 +			 * is extended version of P1021RDB-PC CPLD v4.1 firmware.